1. Field of the Invention
The present invention relates to an image processing apparatus for reproducing an image of high quality.
2. Related Background Art
Halftone images have been reproduced according to conventional methods such as a dither method and a density pattern method. In either method, satisfactory gradation cannot be obtained when a threshold matrix of a small size is used. In order to obtain satisfactory gradation, a threshold matrix of a large size must be used. This results in degradation of resolution and a rough texture structure due to the matrix periodic structure. As a result, a high-quality output cannot be obtained.
In order to solve the above problem, a plurality of dither matrices are used to provide multivalue dot data according to an improved conventional dither method. However, a complicated circuit arrangement is required to synchronize the respective dither matrices, resulting in a bulky and complicated image processing system. In this sense, multivalue dither processing has limitations.
Another conventional technique for forming a halftone image in a laser beam printer or the like is proposed by the present applicant. According to this technique, an input digital image signal is converted into an analog image signal, and the analog image signal is compared with a cyclic analog pattern signal such as a triangular wave signal to generate a PWM (Pulse Width Modulation) binary image signal. FIG. 5 shows an apparatus using this technique. Referring to FIG. 5, a digital video signal of eight bits VD0 to VD7 is latched and timed by a latch 1 in response to a clock signal CLK/2. The video clock signal CLK/2 is a clock signal obtained by dividing the frequency of a master clock signal CLK by a JK flip-flop 5 into halves. The latched video signal is converted by a D/A converter 2 into an analog video signal VA. The analog video signal VA is converted by a resistor 3 into a voltage signal. The voltage signal is input to one input terminal of a comparator 4. The master clock signal CLK is n-divided by a frequency divider 6 to produce a clock signal 1/n. The clock signal 1/n is further divided by a JK flip-flop 8 into halves, thus obtaining a pattern clock signal PCLK having a duty ratio of 50%. Therefore, the pattern clock signal PCLK has a period n times that of the video clock signal CLK/2. The pattern clock signal PCLK is input to an integrator constituted by a variable resistor 10 and a capacitor 11 through a buffer 9 and is converted into a triangular wave signal (i.e., an analog pattern signal) SAW having the same period as that of the pattern clock signal PCLK. The bias component of the triangular wave signal SAW is adjusted by a capacitor 12 and a variable resistor 13. The bias-adjusted signal SAW is input to the other input terminal of the comparator 4 through a protective resistor 14 and a buffer amplifier 15. The comparator 4 compares the analog video signal VA with the triangular wave signal SAW. The analog video signal VA is PWM-modulated according to a density represented thereby. In order to obtain a high gray scale value, the level of the analog video signal VA preferably has a relationship with the level of the triangular wave signal SAW, as shown in FIG. 6. Specifically, a maximum level VAmax (e.g., a black level) of the analog video signal VA coincides with a peak level of the triangular wave signal SAW, and at the same time, a minimum level VAmin (e.g., a white level) of the analog video signal VA coincides with a bottom level of the triangular wave signal SAW. With this relationship, the maximum resolution and full-scale linearity are always maintained. In order to satisfy the relationship given in FIG. 6, the amplitude of the triangular wave signal SAW is adjusted by the variable resistor 10, and the bias component thereof is adjusted by the variable resistor 13.
The apparatus described above must reproduce different types of images. For example, in a character image, accurate reproduction of changes from white to black pixels and vice versa is more important than halftone reproduction. However, in a photographic or halftone image, halftone reproduction is more important. Therefore, the period of the pattern clock signal PCLK is selected in the apparatus of FIG. 5 according to the requirement as to which reproduction mode is more important. More specifically, the frequency division ratio of the frequency divider 6 can be changed in the range of, e.g., 1 to 1/n, in response to a period selection signal SEL. In actual character image reproduction, the frequency division ratio is given as, e.g., 1, and a one-pixel component of the input digital video signal is PWM-modulated by one triangular wave signal SAW to properly reproduce a change from a white pixel to a black pixel and vice versa. However, in photographic image reproduction, the frequency division ratio is given as, e.g., n, an n-pixel component of the input digital video signal VA is PWM-modulated by one triangular wave signal SAW, thereby reproducing a natural halftone image. However, in the conventional image processing apparatus described above, the frequency, amplitude, and bias component of the triangular wave signal SAW are changed whenever the frequency division ratio is changed. This does not satisfy the relationship shown in FIG. 6 any longer. In the apparatus of FIG. 5, the resistances of the variable resistors 10 and 13 must be readjusted. In the case of a mixture of characters and photographs in one page, either type of image must be sacrificed.